A Topology of Multilevel Inverter for Tolerance against Single and Multiple Faults

A TOPOLOGY OF MLI FOR TOLERANCE AGAINST SINGLE & MULTIPLE FAULTS

Authors

  • Aquib Mehdi Naqvi EED, Institute of Engineering and Technology,Lucknow 226 021, Uttar Pradesh, India
  • Pushkar Tripathi EED, Institute of Engineering and Technology,Lucknow 226 021, Uttar Pradesh, India
  • S P Singh EED, Rajkiya Engineering College, Ambedkar Nagar 224 122, Uttar Pradesh, India

DOI:

https://doi.org/10.56042/jsir.v84i02.9253

Keywords:

Detection, Fault-tolerant, Identification, Open-circuit, Switch fault

Abstract

Multilevel Inverter (MLI) offers numerous advantages, making them suitable for a wider range of application. However, the increased number of switches in MLIs raises the probability of faults. A fault in a switch may interrupt the complete power supply, which is a much-undesired condition for a critical load. In this paper, a fault-tolerant MLI topology is proposed for seven and higher voltage levels, capable of tolerating faults and ensuring the continuity of operation. The proposed MLI exhibits high redundancy in switching states, enabling it to produce all voltage levels even in the event of an open circuit fault in any switch. Fault detection and identification of the faulty switch are accomplished through the analysis of switching signals and measured output voltage. The proposed topology is implemented for 15-levels using the nearest level switching technique, operating under normal conditions as well as during different fault scenarios. Upon detection and identification of a fault by the fault detection unit, the switching sequence is updated to ensure the attainment of rated voltage magnitude and voltage levels. The fault-tolerant capability makes the MLI crucial for critical power supplies and renewable energy systems. The topology and its fault-tolerant operation under various fault cases are tested in the MATLAB Simulink environment and validated in real-time using the OPAL-RT Lab simulator.

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Published

13-02-2025

Issue

Section

Electrical, Electronics and Instrumentation Engineering

How to Cite

A Topology of Multilevel Inverter for Tolerance against Single and Multiple Faults: A TOPOLOGY OF MLI FOR TOLERANCE AGAINST SINGLE & MULTIPLE FAULTS. (2025). Journal of Scientific & Industrial Research (JSIR), 84(02), 219-230. https://doi.org/10.56042/jsir.v84i02.9253

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