Exploring the Active Realization of Analog Multi-Level Memristors for Neuromorphic Applications
DOI:
https://doi.org/10.56042/ijpap.v63i8.17960Keywords:
Memristor, MOSFET, Grounded, Memristor, Hysteresis loop, Analog and digital circuit., Analogue memristor, Multi-level memristors, Stationary pointsAbstract
This article presents a novel method for identifying analog memristor functions that enable multiple resistance levels with tailored switching parameters. These multi-level memristors hold potential applications in multi-bit memory systems, chaotic oscillators, and multi-level logic design. The proposed approach is based on constructing a Parameter vs. State Map (PSM), which can be designed to contain a specific number of stationary points along its curvature. The regions surrounding these stationary points serve as discrete resistance levels. Using this method, analog multi-level memristors can be realized with predefined switching characteristics, such as resistance margins and switching thresholds. Unlike conventional memristor emulators, which typically rely on monotonic memristance/conductance functions, the proposed approach enables precise control over resistance states. As a result, memristors developed through this method can replace complex, discrete-valued memristors in various applications. To validate the proposed concept, an OTA (Operational Transconductance Amplifier)-based emulator circuit has been designed and verified through PSPICE simulations, demonstrating the feasibility of the approach.
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