Robust Logic Circuits Design Using SOI Shorted-Gate FinFETs. Indian Journal of Pure & Applied Physics (IJPAP), [S. l.], v. 61, n. 1, p. 57–66, 2023. DOI: 10.56042/ijpap.v61i1.65935. Disponível em: https://or.niscpr.res.in/index.php/IJPAP/article/view/456. Acesso em: 13 may. 2026.